Sun 20 Jul 2008

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Intel, Cray flesh out HPC plans

Comments

Peta,not exa

I guess you rather meant petaflop,not exaflop.Petaflop amounts to 10^15,or quadrillion flops,while exaflop is equal to 10^18-quintillion flops,aka 3 entire orders of magnitude greater.
posted by : Sharpedon, 29 April 2008

Glad, You Mentioned weather.

Some of neat stuff mentioned today n' theINQ. 256 bit width. Why? idea is to prepare as long of bit string as possible so most reliable changes can be effected within chip enviorment in each pass.(Then bringing Pass Rate to Full).
Not much faster at 256 bits due to less end & start bits, just smoother & more stable. Basicly somewhere machine must be 2X faster to prepare 2x wider bit string, if same number of passes is made Unit/Time. Less stop & go confusions.

RISC was memtioned in another article as improvement. RISC is Reduced Instruction Set Code. Basicly you have todays most advanced instruction set, up from yesterdays. Somehow in that interaction there might be sliming or quality increasing. Also adding alpha instructions means reducing what is needed to make newbie instructions feel comfortable, More able to document effect of change.
Every Time CRAY Changes Hardware NEW RISC Is In Order. Then whole mess can be repasted back togerher with more advanced instruction set final outcome. RISC is NOT Better in itsrlf, RISC is Hard.
Once Brains have invented fundumental improvement, those pathways are stuck, So Whole NeW Fresh Team is in Order, To take that Next Leap. Good For CRAY.
See Moore, Get mor.
Drashek
posted by : Symoure_Ultie, 29 April 2008

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